The present invention relates to a semiconductor apparatus using an MOS-type device, designed to control a time-period between the receiving of an external signal and the actual action of the device itself so as to achieve improvement in response and efficiency, and reduction in EMI noise and switching loss.
In a semiconductor apparatus having a tail-end circuit with a MOS-type device to be driven by an external signal, the MOS-type device has a relatively large delay time between the receiving of the external signal intended to turn off the device and the establishment of its actual OFF state. This delay time is caused by a capacitance around the gate of the device. Heretofore, in a circuit for switching the gate, a resistor inserted in series to the gate has been preset at a certain value to adequately control the charge and discharge of the gate. That is, the rise and fall times of a gate voltage have been adjusted in accordance with a CR time constant determined by a gate capacitance C and a gate resistance R.
The respective timings of allowing current to start passing through the device and allowing the current to be cut off are dependent on a threshold voltage specific to the device. In particular, the turn-off action of the device is related to a switching speed specific to the device. Thus, the technique of controlling the gate charging and discharging times of the device only by a gate resistor set at a certain fixed value results in creation of another delay time in addition to the delay time due to the threshold voltage of the device, which leads to deterioration in efficiency.
Further, if the charge and discharge of the gate is conducted using a gate resistor set at a fixed value, a switching speed during the turn-on of the device will become faster in a low current range than that in a rated current range. The resulting increased value dV/dt during the turn-on of a free-wheel diode (FWDi) connected in parallel to the device serves as a factor of causing the degradation in EMI noise. Otherwise, if the switching speed during the turn-on is lowered to reduce EMI noise, a switching loss will be increased.
As above, there is a trade-off relationship between EMI noise and switching loss. For this reason, the gate resistor has heretofore been preset at a certain value selected based on a compromise point compatible with both EMI noise and switching loss.
In order to allowing the gate of a device to be driven at low loss and low noise, there has been known a technique in which a plurality of MOSFETs each having a different turn-on resistance are used as switches for driving the gate of an IGBT, and these switches are sequentially combined such that the entire turn-on resistance is transitionally changed to vary a gate drive performance [see, for example, Japanese Patent Laid-Open Publication No. 2001-223571, “Gate Drive Circuit for Voltage Driven-type Semiconductor Device” (Paragraph [0005], FIG. 2), hereinafter referred to as Patent Publication 1].
There has also been known a technique for noise reduction in which the value di/dt in a detected IGBT collector current is compared with a command value through a comparator, and a switch is turned on and off in accordance with the comparison result to instantaneously change a gate resistance [see, for example, Japanese Patent Laid-Open Publication No. 10-150764, “Gate Drive Circuit for use in Power Converter” (Paragraph [0008], FIG. 6), hereinafter referred to as Patent Publication 2].
The circuit disclosed in Patent Publication 1 is a type of controlling a gate voltage. Further, the circuit involves a number of switches and a complicate control for sequentially turning on the switches depending on the characteristics of the IGBT.
In the circuit disclosed in Patent Publication 2, if the gate resistance is sharply changed during a turn-on operation where a collector current flows at a value approximately equal to a comparison reference value of the comparator, the operation of the IGBT is likely to become unstable to cause oscillation in an output current therefrom.